Design Verification Architect / Principal
Description Arteris enables engineering and design teams at the world's most transformative brands to connect and integrate today's system-on-chips (SoCs) that fuel modern innovation.
If you've held a smartphone, driven an electronic car, or powered up a smart TV, you've come in contact with what we do at Arteris.
Here, the future is quite literally in your hands-and when it isn't, chances are it is flying overhead in a drone, a satellite, or in the cloud at a datacenter! As a key Design Verification Architect at Arteris, you will work with an expert team to design and deliver interconnect & memory hierarchy solutions for some of the world's most sophisticated mobile, telecom, automotive, and consumer SoC designs.
You will create designs in a powerful language that blends traditional RTL with leading-edge software to provide extremely configurable, testable, and high-quality solutions.
You will go home at the end of the day amazed at all the places where your creations end up.
You will have the opportunity to be part of a proven-successful startup, and to influence development environment, architecture, verification, and everything in-between - you will no longer be stuck in a silo or just a cog in the machine.
Your co-workers will be an experienced team of industry experts that love what they do.
Key
Responsibilities:
oWork with the architecture and design team to make sure the verification is taken care of as early as in the architecture stage.
Work as a bridge between the architecture, the design and the verification teams.
oGuide the verification team in test plan creation, testcases, coverage and coverage exclusion.
oProvide verification methodology.
Requirements:
oStrong background in microprocessor design, cache coherency, memory ordering and cache configuration.
oSolid verification industry experience.
oGood communication skills.
Good documentation skills.
oMS in EE, CS, CE or Mathematics.
10
years' experience.
Estimated Base Salary:
o$180,000 - $280,000 annually About Arteris:
Arteris is a leading provider of system IP for the acceleration of system-on-chip (SoC) development across today's electronic systems.
Arteris network-on-chip (NoC) interconnect IP and SoC integration automation technology enable higher product performance with lower power consumption and faster time to market, delivering better SoC economics so its customers can focus on dreaming up what comes next.
With over 250 employees with headquarters in Silicon Valley and offices around the globe, we are a catalyst for SoC innovation so companies ranging from startups to the biggest technology market leaders can effectively create new products with proven connectivity flexibility and ease.
Learn more at arteris.
com.
Recommended Skills Architecture Communication Mathematics Cpu Design Estimated Salary: $20 to $28 per hour based on qualifications.
If you've held a smartphone, driven an electronic car, or powered up a smart TV, you've come in contact with what we do at Arteris.
Here, the future is quite literally in your hands-and when it isn't, chances are it is flying overhead in a drone, a satellite, or in the cloud at a datacenter! As a key Design Verification Architect at Arteris, you will work with an expert team to design and deliver interconnect & memory hierarchy solutions for some of the world's most sophisticated mobile, telecom, automotive, and consumer SoC designs.
You will create designs in a powerful language that blends traditional RTL with leading-edge software to provide extremely configurable, testable, and high-quality solutions.
You will go home at the end of the day amazed at all the places where your creations end up.
You will have the opportunity to be part of a proven-successful startup, and to influence development environment, architecture, verification, and everything in-between - you will no longer be stuck in a silo or just a cog in the machine.
Your co-workers will be an experienced team of industry experts that love what they do.
Key
Responsibilities:
oWork with the architecture and design team to make sure the verification is taken care of as early as in the architecture stage.
Work as a bridge between the architecture, the design and the verification teams.
oGuide the verification team in test plan creation, testcases, coverage and coverage exclusion.
oProvide verification methodology.
Requirements:
oStrong background in microprocessor design, cache coherency, memory ordering and cache configuration.
oSolid verification industry experience.
oGood communication skills.
Good documentation skills.
oMS in EE, CS, CE or Mathematics.
10
years' experience.
Estimated Base Salary:
o$180,000 - $280,000 annually About Arteris:
Arteris is a leading provider of system IP for the acceleration of system-on-chip (SoC) development across today's electronic systems.
Arteris network-on-chip (NoC) interconnect IP and SoC integration automation technology enable higher product performance with lower power consumption and faster time to market, delivering better SoC economics so its customers can focus on dreaming up what comes next.
With over 250 employees with headquarters in Silicon Valley and offices around the globe, we are a catalyst for SoC innovation so companies ranging from startups to the biggest technology market leaders can effectively create new products with proven connectivity flexibility and ease.
Learn more at arteris.
com.
Recommended Skills Architecture Communication Mathematics Cpu Design Estimated Salary: $20 to $28 per hour based on qualifications.
|
|
 | |
